Siemens EDA Forum Report: Yield Improvement With SONR And SDPAL

This report summarizes content from the Siemens EDA Forum on August 28, 2025, focusing on how Siemens uses AI and machine learning driven solutions, including Tessent DDYA, Calibre SONR, and Calibre SDPAL, to diagnose, predict, and locate semiconductor defects.

Executive Summary

Yield loss in modern semiconductor manufacturing is changing. As process nodes shrink below 7nm, systematic defects have replaced random defects as the main source of yield loss. Even in mature processes, systematic defects can account for more than 60%.

Traditional failure analysis methods are often too slow, taking weeks or even months, and they lack the required localization resolution.

Siemens presented a set of EDA tools that use machine learning and AI to address these challenges:

1. Tessent DDYA: a high-resolution platform for diagnosing scan-test failures. Combined with RCD / RCAD machine learning techniques, it can identify root causes in high-volume failing chips.
2. Calibre SONR: a feature-based machine learning method that moves beyond traditional pattern matching by learning the geometric and process features behind defects.
3. Calibre SDPAL: a systematic defect pattern analysis and localization engine that improves the ability to locate defect physical coordinates.

Tessent Diagnosis-Driven Yield Analysis

The first part of the talk focused on improving defect diagnosis resolution and performing root-cause analysis with large-scale data.

Diagnosis Challenges

1. Long analysis time: physical failure analysis can take weeks or months, especially when multiple suspect locations exist.
2. Resolution bottleneck: physical methods such as e-beam probing can struggle to pinpoint defects.
3. Complex failure modes: advanced issues related to power domains or global signals are difficult to diagnose.

Tessent DDYA Technologies

Technology	Role
Cell-aware diagnosis	Diagnoses defects inside standard cells. The PFA hit rate is above 90% across nodes from 160nm to 3nm. For complex multi-bit scan cells, the suspect area can be reduced by up to 20×.
Global control diagnosis	Around 30% of multi-scan-chain failure cases are caused by defects on global control signals such as clocks. This technology identifies common signal paths causing failures.
Scan-chain diagnosis	Improves scan-chain diagnosis resolution and reduces the area requiring PFA.

The talk cited an ITC 2023 paper co-authored with AMD. A chip with 11 failing scan chains was diagnosed by Tessent DDYA as having a defect on a clock signal. Subsequent PFA found an open defect at the predicted location.

Feature-Based ML Defect Prediction And Localization

The second half of the talk discussed a more advanced feature-based machine learning approach for proactive defect prediction.

Pattern-Based vs Feature-Based

Method	Description	Limitation or strength
Pattern-based matching	Searches for exact or fuzzy matches to known defective patterns.	Can only find known problems and may miss new patterns with the same root cause.
Feature-based techniques	Decomposes layouts into basic features and learns combinations that cause defects.	Can identify new, unseen, but failure-prone layout patterns.

Calibre SONR: A Feature-Based ML Platform

The core idea of Calibre SONR is that feature engineering is critical for successful machine learning. It extracts features at both pattern and design levels to understand layouts more comprehensively, while allowing user-defined features.

This method helps design teams proactively discover new hotspots, understand process sensitivity, and repair potential defects early by replacing weak patterns with known robust ones. The talk showed single-layer and multi-layer defect prediction examples where the feature-based method found new critical patterns missed by traditional PM.

Single-layer defect prediction	Multi-layer defect prediction

Calibre SDPAL: Systematic Defect Pattern Analysis And Localization

Diagnosis can identify a failing net, but often cannot point to the exact physical coordinates of the failure on that net. Calibre SDPAL is designed to address this problem.

Problem addressed by SDPAL	SDPAL solution

SDPAL uses an AI/ML engine that takes layout and diagnostic reports as input and locates problematic layout patterns. This accelerates failure analysis and allows the next design revision to be fixed before full FA results return.

SDPAL result 1	SDPAL result 2

Conclusion

The strength of Siemens’ EDA flow is tool synergy, forming an integrated, intelligent, data-driven ecosystem.

1. Tessent DDYA provides high-resolution scan-chain diagnosis and uses machine learning to analyze root causes from large diagnostic datasets.
2. Calibre SONR identifies defect-prone layout features and accelerates process learning.
3. Calibre SDPAL uses AI/ML to identify failing patterns and locate their physical coordinates, accelerating failure analysis.

Together, these tools help semiconductor companies handle advanced-node manufacturing complexity, accelerate yield ramp, and improve overall product quality.